I’m being pedantic here but RISC-V is not a hardware architecture as in something that you can send to a manufacturer and get it made. It is an ISA. How you implement those ISA is up to you. Yes there are open implementations but I think it is important to distinguish it.
So does x86. The difference is license. Just like how Intel and AMD have a VERY different design (implementation) as of now, so does RISC-V. Any vendor can implement it however they want, but they won’t have to pay anyone for using RISC-V ISA
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I’m being pedantic here but RISC-V is not a hardware architecture as in something that you can send to a manufacturer and get it made. It is an ISA. How you implement those ISA is up to you. Yes there are open implementations but I think it is important to distinguish it.
isnt ARM the same?
So does x86. The difference is license. Just like how Intel and AMD have a VERY different design (implementation) as of now, so does RISC-V. Any vendor can implement it however they want, but they won’t have to pay anyone for using RISC-V ISA