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Could you elaborate? Do you happen to have any theories as to why?
I have a zen 3 chip and while I’m not planning anything like this, I’m just curious.
I don’t know, but I’d guess the buffered chipset controller has more stability during certain power state transitions.
I think I’ve seen this hypothesis too and it makes sense to me.
If I’m building a new AMD system today, I’d look for a board that exposes more of the chipset-provided USB ports. Otherwise I’d budget for a high quality 4-port PCIe USB controller, if I’m planning to rely a lot on USB on that system.
This article provides some context. Now I do have the latest firmware which should have these fixes but they don’t seem to be foolproof. I’ve seen reports around the web that the firmware improves things but doesn’t completely eliminate them.
If you’ve seen devices disconnecting and reconnecting on occasion, it could be it.